1. Field of the Invention
This invention relates to semiconductor integrated circuits and, in particular, to a technique for controlling substrate current injection in lateral bipolar transistors.
2. Discussion of the Prior Art
It has long been recognized that whenever a lateral transistor is used in a bipolar chip, there arises a parasitic vertical transistor which injects current into the substrate.
To date, efforts to minimize this parasitic current loss have been limited to introducing as much dopant as possible into the buried layer. This method is limited in its usefulness by at least two factors. First, the buried layer lateral diffusion is restricted by the distance between adjoining isolated buried layers. That is, the maximum number of buried layers which may be placed in any area is limited by the size of the buried layers to be so placed. The size of any buried layer, in each lateral direction, is equal to the width of the opening in the buried layer oxide (the buried layer masking window) plus the distance that the buried layer doping impurity diffuses laterally from the edge of the opening in the buried layer oxide (buried layer lateral diffusion). Second, the effectiveness of the impurity concentration in the buried layer in reducing any minority carrier currents from being injected through it and into the substrate is dependent upon the alignment between the buried layer and the epitaxial island which forms the body of the active region above the buried layer. That is, the buried layer is positioned under the active base and emitter regions of the epitaxial regions by the alignment of the so-called Isolation Mask to the so-called Buried Layer Mask. The reproducibility with which this alignment can be made is one of the limiting factors affecting the effectiveness of the buried layer in reducing the minority carrier currents collected by the reverse biased substrate.
This is due to the relationship between base current and the collector current in a bipolar transistor. The model first proposed by Schockley states that the ratio of the collector current (current into the substrate in this case) and the base current (majority current removed ohmically from the buried layer) is inversely proportional to the amount of buried layer impurity placed between the forward biased emitter-base (P-Emitter to N-Base/Buried Layer) junction and the reversed biased base-collector (N-Base/Buried Layer to P-Collector/Substrate) junction.
U.S. patent application Ser. No. 219,784, entitled "Ion Implanted Memory Cells For High Density RAM", inventors Ko et al., filed Jan. 18, 1982 and assigned to the assignee of the present invention, discloses a process wherein lateral PNP transistors are formed as part of high density random access memory (RAM) cells. While the process disclosed therein represents a significant improvement in packing density and yield over the prior art, and thereby makes possible the fabrication of bipolar memory cells in accordance with very large scale integration (VLSI) packing densities, it retains the basic substrate injection deficiency discussed above.
In prior art bipolar RAM cells fabricated in integrated injection logic (I.sup.2 L) technology, such as the cells disclosed in the above-referenced application, when either or both of the P-emitter and the P-collector of the lateral PNP transistor are forward biased, they inject current, generally, in two directions. One direction is the proper direction, that is, from P-emitter to P-collector or, when the PNP transistor is saturated, from P-collector to P-emitter. The other, undesirable current path is from the P-emitter into the substrate. Typically, the injection current into the substrate is several times larger than the current in the desired, lateral direction.
As stated above, in the past, a solution to the problem of substrate current injection has been to increase the doping in the buried layer. Referring to FIG. 1, which illustrates a cross-section of a high-density RAM cell fabricated according to the process of the above-referenced application, the buried layer of the cell, if properly formed, extends between the isolation oxide regions surrounding the cell. Thus, increased doping in the buried layer is usually sufficient to arrest substrate current injection from the emitter of the lateral PNP transistor to a reasonable level. However, particularly with denser RAM cells, because of the small mask dimensions and the difficulty in obtaining precise registration between the Buried Layer mask and the Isolation mask, the buried layer frequently does not span the distance between isolation oxide regions. That is, as illustrated in FIG. 2, it often occurs that gaps g, exist between the edges of the buried layer and the isolation oxide. When this occurs, increased doping in the buried layer is not effective in preventing substrate injection because the substrate is not properly sealed off.